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ASIC & FPGA

"For When You Need The Highest Performance, Lowest Energy Consumption & The Smallest Form Factor."

Increasingly used for IoT, Data Centers, Autonomous Vehicles, Machine Learning, Neural Networks, Deep Learning

Increasing design complexity and timescale pressure

Advances in silicon process capability

Performance, cost, and power optimisation

Verification complexity and coverage

IP selection and integration

New EDA tools and methodologies


The Future...

Papermaster is part of an industry-wide effort around a new doctrine of chip design that Intel, AMD, and the Pentagon all say can help keep computers improving at the pace Moore’s law has conditioned society to expect.

The new approach comes with a snappy name: chiplets. You can think of them as something like high-tech Lego blocks. Instead of carving new processors from silicon as single chips, semiconductor companies assemble them from multiple smaller pieces of silicon—known as chiplets. "I think the whole industry is going to be moving in this direction" Papermaster says.